diff --git a/arch/arm/cortex_m/src/jmp.S b/arch/arm/cortex_m/src/jmp.S index b4ce07665a0e92663a35296477f6026354414e8d..b3890fa8136cd82776492fdd6d3bf87089d8bc3f 100644 --- a/arch/arm/cortex_m/src/jmp.S +++ b/arch/arm/cortex_m/src/jmp.S @@ -60,7 +60,8 @@ longjmp: mov sp, r3 #else ldmia r0!, {r4-r11,lr} -#if !defined(LOSCFG_ARCH_CORTEX_M3) && !defined(LOSCFG_ARCH_ARM_V6M) +#if !defined(LOSCFG_ARCH_CORTEX_M3) && !defined(LOSCFG_ARCH_ARM_V6M) && \ + defined(LOSCFG_ARCH_FPU_ENABLE) vldmia r0!, {d8-d15} #endif ldr sp, [r0] @@ -94,7 +95,8 @@ setjmp: movs r0, #0 #else stmia r0!, {r4-r11,lr} -#if !defined(LOSCFG_ARCH_CORTEX_M3) && !defined(LOSCFG_ARCH_ARM_V6M) +#if !defined(LOSCFG_ARCH_CORTEX_M3) && !defined(LOSCFG_ARCH_ARM_V6M) && \ + defined(LOSCFG_ARCH_FPU_ENABLE) vstmia r0!, {d8-d15} #endif str sp, [r0] diff --git a/components/fs/Makefile b/components/fs/Makefile index cdd43238d391bf3f890eb1aa91d3f5ded39bb037..8a19f31dd5fc762e7b73d37795fdf930c14925cc 100644 --- a/components/fs/Makefile +++ b/components/fs/Makefile @@ -45,6 +45,7 @@ endif ifeq ($(LOSCFG_COMPONENTS_FS_LITTLEFS), y) LOCAL_DIRS_y += littlefs LOCAL_DIRS_y += littlefs/$(LITTLEFS_VERSION) +LOCAL_DIRS_y += littlefs/$(LITTLEFS_VERSION)/bd endif LOCAL_SRCS_y += $(foreach dir, $(LOCAL_DIRS_y), $(wildcard $(dir)/*.c)) diff --git a/components/fs/fs.mk b/components/fs/fs.mk index 06b0a4575acf04eff04a7a3c9114d72f911f9bc5..63be91c3fb180fa48e2c4e06459bc14c1ff46046 100644 --- a/components/fs/fs.mk +++ b/components/fs/fs.mk @@ -17,5 +17,6 @@ ifeq ($(LOSCFG_COMPONENTS_FS_LITTLEFS), y) LITTLEFS_VERSION := littlefs-2.3.0 COMPONENTS_FS_INCLUDE += -DLFS_THREADSAFE COMPONENTS_FS_INCLUDE += \ - -I $(LITEOSTOPDIR)/components/fs/littlefs/$(LITTLEFS_VERSION) + -I $(LITEOSTOPDIR)/components/fs/littlefs/$(LITTLEFS_VERSION) \ + -I $(LITEOSTOPDIR)/components/fs/littlefs/$(LITTLEFS_VERSION)/bd endif diff --git a/targets/Kconfig.qemu b/targets/Kconfig.qemu index 774b33f8eaf8e5862836b206055c8456b72912a5..bec67d882dc82c69b54fdd663472fd378baedafa 100644 --- a/targets/Kconfig.qemu +++ b/targets/Kconfig.qemu @@ -1,9 +1,10 @@ config LOSCFG_PLATFORM string - default "realview-pbx-a9" if LOSCFG_PLATFORM_PBX_A9 - default "qemu-virt-a53" if LOSCFG_PLATFORM_QEMU_VIRT_A53 - default "SmartL_E802" if LOSCFG_PLATFORM_SMARTL_E802 - default "ESP32" if LOSCFG_PLATFORM_ESP32_QEMU + default "realview-pbx-a9" if LOSCFG_PLATFORM_PBX_A9 + default "qemu-virt-a53" if LOSCFG_PLATFORM_QEMU_VIRT_A53 + default "SmartL_E802" if LOSCFG_PLATFORM_SMARTL_E802 + default "ESP32" if LOSCFG_PLATFORM_ESP32_QEMU + default "qemu_mps2_an386" if LOSCFG_PLATFORM_MPS2AN386 choice prompt "Target" @@ -14,6 +15,7 @@ choice realview-pbx-a9 SmartL_E802 ESP32 + qemu_mps2_an386 config LOSCFG_PLATFORM_PBX_A9 bool "realview-pbx-a9" @@ -48,4 +50,11 @@ config LOSCFG_PLATFORM_ESP32_QEMU select LOSCFG_XTENSA_LX6_TIMER select LOSCFG_LX6_INT_CONTROLLER +config LOSCFG_PLATFORM_MPS2AN386 + bool "qemu_mps2_an386" + select LOSCFG_USING_BOARD_LD + select LOSCFG_ARCH_CORTEX_M4 + select LOSCFG_CORTEX_M_NVIC + select LOSCFG_CORTEX_M_SYSTICK + endchoice diff --git a/targets/qemu_mps2_an386/Inc/arm_uart_drv.h b/targets/qemu_mps2_an386/Inc/arm_uart_drv.h new file mode 100644 index 0000000000000000000000000000000000000000..729a80601404658860bf90472870bfbc12a06a4f --- /dev/null +++ b/targets/qemu_mps2_an386/Inc/arm_uart_drv.h @@ -0,0 +1,231 @@ +/* + * Copyright (c) 2016-2018 ARM Limited + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +/** + * \file arm_uart_drv.h + * \brief Generic driver for ARM UART. + */ + +#ifndef __ARM_UART_DRV_H__ +#define __ARM_UART_DRV_H__ + +#include + +#ifdef __cplusplus +extern "C" { +#endif + +/* ARM UART device configuration structure */ +struct arm_uart_dev_cfg_t { + const uint32_t base; /*!< UART base address */ + const uint32_t default_baudrate; /*!< Default baudrate */ +}; + +/* ARM UART device data structure */ +struct arm_uart_dev_data_t { + uint32_t state; /*!< Indicates if the uart driver + is initialized and enabled */ + uint32_t system_clk; /*!< System clock */ + uint32_t baudrate; /*!< Baudrate */ +}; + +/* ARM UART device structure */ +struct arm_uart_dev_t { + const struct arm_uart_dev_cfg_t* cfg; /*!< UART configuration */ + struct arm_uart_dev_data_t* data; /*!< UART data */ +}; + +/* ARM UART enumeration types */ +enum arm_uart_error_t { + ARM_UART_ERR_NONE = 0, /*!< No error */ + ARM_UART_ERR_INVALID_ARG, /*!< Error invalid input argument */ + ARM_UART_ERR_INVALID_BAUD, /*!< Invalid baudrate */ + ARM_UART_ERR_NOT_INIT, /*!< Error UART not initialized */ + ARM_UART_ERR_NOT_READY, /*!< Error UART not ready */ +}; + +enum arm_uart_irq_t { + ARM_UART_IRQ_RX, /*!< RX interrupt source */ + ARM_UART_IRQ_TX, /*!< TX interrupt source */ + ARM_UART_IRQ_COMBINED, /*!< RX-TX combined interrupt source */ + ARM_UART_IRQ_NONE = 0xFF /*!< RX-TX combined interrupt source */ +}; + +/** + * \brief Initializes UART. It uses the default baudrate to configure + * the peripheral at this point. + * + * \param[in] dev UART device struct \ref arm_uart_dev_t + * \param[in] system_clk System clock used by the device. + * + * \return Returns error code as specified in \ref arm_uart_error_t + * + * \note This function doesn't check if dev is NULL. + */ +enum arm_uart_error_t arm_uart_init(struct arm_uart_dev_t* dev, + uint32_t system_clk); + +/** + * \brief Sets the UART baudrate. + * + * \param[in] dev UART device struct \ref arm_uart_dev_t + * \param[in] baudrate New baudrate. + * + * \return Returns error code as specified in \ref arm_uart_error_t + * + * \note This function doesn't check if dev is NULL. + */ +enum arm_uart_error_t arm_uart_set_baudrate(struct arm_uart_dev_t* dev, + uint32_t baudrate); + +/** + * \brief Gets the UART baudrate. + * + * \param[in] dev UART device struct \ref arm_uart_dev_t + * + * \return Returns the UART baudrate. + * + * \note This function doesn't check if dev is NULL. + */ +uint32_t arm_uart_get_baudrate(struct arm_uart_dev_t* dev); + +/** + * \brief Sets system clock. + * + * \param[in] dev UART device struct \ref arm_uart_dev_t + * \param[in] system_clk System clock used by the device. + * + * \return Returns error code as specified in \ref arm_uart_error_t + * + * \note This function doesn't check if dev is NULL. + */ +enum arm_uart_error_t arm_uart_set_clock(struct arm_uart_dev_t* dev, + uint32_t system_clk); +/** + * \brief Reads one byte from UART dev. + * + * \param[in] dev UART device struct \ref arm_uart_dev_t + * \param[in] byte Pointer to byte. + * + * \return Returns error code as specified in \ref arm_uart_error_t + * + * \note For better performance, this function doesn't check if dev and byte + * pointer are NULL, and if the driver is initialized. + */ +enum arm_uart_error_t arm_uart_read(struct arm_uart_dev_t* dev, uint8_t* byte); + +/** + * \brief Writes a byte to UART dev. + * + * \param[in] dev UART device struct \ref arm_uart_dev_t + * \param[in] byte Byte to write. + * + * \return Returns error code as specified in \ref arm_uart_error_t + * + * \note For better performance, this function doesn't check if dev is NULL and + * if the driver is initialized to have better performance. + */ +enum arm_uart_error_t arm_uart_write(struct arm_uart_dev_t* dev, uint8_t byte); + +/** + * \brief Enables TX interrupt. + * + * \param[in] dev UART device struct \ref arm_uart_dev_t + * + * \return Returns error code as specified in \ref arm_uart_error_t + * + * \note This function doesn't check if dev is NULL. + */ +enum arm_uart_error_t arm_uart_irq_tx_enable(struct arm_uart_dev_t* dev); + +/** + * \brief Disables TX interrupt. + * + * \param[in] dev UART device struct \ref arm_uart_dev_t + * + * \note This function doesn't check if dev is NULL. + */ +void arm_uart_irq_tx_disable(struct arm_uart_dev_t* dev); + +/** + * \brief Verifies if Tx is ready to send more data. + * + * \param[in] dev UART device struct \ref arm_uart_dev_t + * + * \return 1 if TX is ready, 0 otherwise. + * + * \note This function doesn't check if dev is NULL. + */ +uint32_t arm_uart_tx_ready(struct arm_uart_dev_t* dev); + +/** + * \brief Enables RX interrupt. + * + * \param[in] dev UART device struct \ref arm_uart_dev_t + * + * \return Returns error code as specified in \ref arm_uart_error_t + * + * \note This function doesn't check if dev is NULL. + */ +enum arm_uart_error_t arm_uart_irq_rx_enable(struct arm_uart_dev_t* dev); + +/** + * \brief Disables RX interrupt + * + * \param[in] dev UART device struct \ref arm_uart_dev_t + * + * \note This function doesn't check if dev is NULL. + */ +void arm_uart_irq_rx_disable(struct arm_uart_dev_t* dev); + +/** + * \brief Verifies if Rx has data. + * + * \param[in] dev UART device struct \ref arm_uart_dev_t + * + * \return 1 if RX has data, 0 otherwise. + * + * \note This function doesn't check if dev is NULL. + */ +uint32_t arm_uart_rx_ready(struct arm_uart_dev_t* dev); + +/** + * \brief Clears UART interrupt. + * + * \param[in] dev UART device struct \ref arm_uart_dev_t + * \param[in] irq IRQ source to clean \ref arm_uart_irq_t + * + * \note This function doesn't check if dev is NULL. + */ +void arm_uart_clear_interrupt(struct arm_uart_dev_t* dev, + enum arm_uart_irq_t irq); + +/** + * \brief Returns UART interrupt status. + * + * \param[in] dev UART device struct \ref arm_uart_dev_t + * + * \return IRQ status \ref arm_uart_irq_t + * + * \note This function doesn't check if dev is NULL. + */ +enum arm_uart_irq_t arm_uart_get_interrupt_status(struct arm_uart_dev_t* dev); + +#ifdef __cplusplus +} +#endif +#endif /* __ARM_UART_DRV_H__ */ \ No newline at end of file diff --git a/targets/qemu_mps2_an386/Inc/soc.h b/targets/qemu_mps2_an386/Inc/soc.h new file mode 100644 index 0000000000000000000000000000000000000000..98b6dd0fd0ec0bf5f9a5e9f0099bd42de81a2eb0 --- /dev/null +++ b/targets/qemu_mps2_an386/Inc/soc.h @@ -0,0 +1,79 @@ +/* ---------------------------------------------------------------------------- + * Copyright (c) Huawei Technologies Co., Ltd. 2022-2022. All rights reserved. + * Description: Soc Config HeadFile + * Author: Huawei LiteOS Team + * Create: 2022-04-02 + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of + * conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list + * of conditions and the following disclaimer in the documentation and/or other materials + * provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used + * to endorse or promote products derived from this software without specific prior written + * permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, + * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR + * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, + * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; + * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR + * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF + * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * --------------------------------------------------------------------------- */ + +#ifndef _ST_CONFIG_H +#define _ST_CONFIG_H + +#ifdef __cplusplus +#if __cplusplus +extern "C" { +#endif +#endif + +#define IRQn_Type int + +#define __CM4_REV 0x0001 +#define __NVIC_PRIO_BITS 4 +#define __MPU_PRESENT 1 +#define __Vendor_SysTickConfig 0 +#define __FPU_PRESENT 1 + +#define SysTick_IRQn (-1) +#define PendSV_IRQn (-2) +#define NonMaskableInt_IRQn (-14) +#define MemoryManagement_IRQn (-12) +#define BusFault_IRQn (-11) +#define UsageFault_IRQn (-10) +#define SVCall_IRQn (-5) + +#define Uart0_Rx_IRQn 0 + +#define SYSCLK_FREQ 25000000 + +#define UART0_BASE 0x40004000 +#define UART1_BASE 0x40005000 +#define UART2_BASE 0x40006000 +#define UART3_BASE 0x40007000 +#define UART4_BASE 0x40009000 + +#define UART0_CLK_FREQ SYSCLK_FREQ +#define UART0_BAUDRAT 115200 + +#define WATCHDOG_BASE 0x40008000 +#define GPIO_BASE(no) (0x40010000 + (unsigned int)(no) * 0x1000) /* no: 0 ~ 3 */ +#define TIMER_BASE(no) (0x40000000 + (unsigned int)(no) * 0x1000) + +#ifdef __cplusplus +#if __cplusplus +} +#endif /* __cplusplus */ +#endif /* __cplusplus */ + +#include "core_cm4.h" + +#endif diff --git a/targets/qemu_mps2_an386/Inc/usart.h b/targets/qemu_mps2_an386/Inc/usart.h new file mode 100644 index 0000000000000000000000000000000000000000..27445f4523abf9a17bffccda4828df4c52138a6a --- /dev/null +++ b/targets/qemu_mps2_an386/Inc/usart.h @@ -0,0 +1,51 @@ +/* ---------------------------------------------------------------------------- + * Copyright (c) Huawei Technologies Co., Ltd. 2022-2022. All rights reserved. + * Description: Usart HeadFile + * Author: Huawei LiteOS Team + * Create: 2022-04-02 + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of + * conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list + * of conditions and the following disclaimer in the documentation and/or other materials + * provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used + * to endorse or promote products derived from this software without specific prior written + * permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, + * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR + * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, + * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; + * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR + * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF + * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * --------------------------------------------------------------------------- */ + +#ifndef _USART_H +#define _USART_H + +#include "uart.h" +#include "los_event.h" + +#ifdef __cplusplus +#if __cplusplus +extern "C" { +#endif +#endif + +extern UartControllerOps g_genericUart; + +VOID UartInit(VOID); + +#ifdef __cplusplus +#if __cplusplus +} +#endif /* __cplusplus */ +#endif /* __cplusplus */ + +#endif diff --git a/targets/qemu_mps2_an386/Makefile b/targets/qemu_mps2_an386/Makefile new file mode 100644 index 0000000000000000000000000000000000000000..30365369a22ba170373460fb0da0586e8f4ed2e0 --- /dev/null +++ b/targets/qemu_mps2_an386/Makefile @@ -0,0 +1,44 @@ +include $(LITEOSTOPDIR)/config.mk + +MODULE_NAME := $(LITEOS_PLATFORM) + +LOCAL_SRCS := \ + Src/main.c \ + Src/usart.c \ + Src/user_task.c \ + Src/arm_uart_drv.c + +ifeq ($(LOSCFG_COMPONENTS_FS_LITTLEFS), y) + LOCAL_SRCS += Src/lfs_hal.c +endif + +ifeq ($(LOSCFG_PLATFORM_ADAPT), y) +LOCAL_SRCS += $(wildcard os_adapt/*.c) +endif + +ALL_ASSRCS := $(wildcard *.S) +ASSRCS := $(ALL_ASSRCS) + +# C defines +C_DEFS += \ + -D__LITEOS__ \ + -D_ALL_SOURCE \ + -DUSE_HAL_DRIVER \ + -DNDEBUG + +LOCAL_SRCS += $(ASSRCS) + +LOCAL_INCLUDE += \ + -I $(LITEOSTOPDIR)/targets/$(LITEOS_PLATFORM)/include \ + -I $(LITEOSTOPDIR)/targets/$(LITEOS_PLATFORM)/include/asm \ + -I $(LITEOSTOPDIR)/targets/$(LITEOS_PLATFORM)/Inc \ + +BOARD_DEF += $(C_DEFS) + +LOCAL_EXT_FLAG := \ + -Wno-error=discarded-qualifiers -Wno-error -Wno-error=return-type \ + -Wno-return-type -Wno-discarded-qualifiers -Wno-unused-function + +LOCAL_FLAGS := $(LITEOS_CFLAGS_INTERWORK) $(BOARD_DEF) $(LOCAL_INCLUDE) $(LITEOS_GCOV_OPTS) $(LOCAL_EXT_FLAG) + +include $(MODULE) diff --git a/targets/qemu_mps2_an386/README_CN.md b/targets/qemu_mps2_an386/README_CN.md new file mode 100644 index 0000000000000000000000000000000000000000..c178b9ee8dbfdf84d04edf63450091db08455416 --- /dev/null +++ b/targets/qemu_mps2_an386/README_CN.md @@ -0,0 +1,73 @@ +# 使用 mps2-an386 qemu 下运行 LiteOS + +## 安装QEMU + +- QEMU 可以模拟内核运行在不同的单板，解除对物理开发板的依赖。 +- 以 Ubuntu Linux 环境为例，如果未安装 QEMU 工具，可使用如下命令下载安装: + + 安装依赖(Ubuntu 18+) + ``` + $ sudo apt install build-essential zlib1g-dev pkg-config libglib2.0-dev binutils-dev libboost-all-dev autoconf libtool libssl-dev libpixman-1-dev virtualenv flex bison + ``` + + 获取源码 + ``` + $ wget https://download.qemu.org/qemu-6.0.0.tar.xz + ``` + + 编译安装 + ``` + $ tar -xf qemu-6.0.0.tar.xz + $ cd qemu-6.0.0 + $ mkdir build && cd build + $ ../configure --prefix=qemu_installation_path + $ make -j + ``` + + 等待编译结束, 执行安装命令: + ``` + $ tar -xf qemu-6.0.0.tar.xz + $ cd qemu-6.0.0 + $ mkdir build && cd build + $ ../configure --prefix=qemu_installation_path + $ make -j + ``` + + 最后将安装路径添加到环境变量中: + ``` + $ vim ~/.bashrc + ``` + + 在~/.bashrc最末尾加入: + ``` + $ export PATH=$PATH:qemu_installation_path + ``` + +## Linux环境下编译 mps2-an386 + +- 修改编译需要的`.config`文件为 mps2-an386 的默认配置文件： + ``` + $ cp tools/build/config/qemu_mps2_an386.config .config + $ make clean; make -j + ``` + +- 编译后使用如下命令运行 QEMU： + ``` + $ qemu-system-arm -M mps2-an386 -m 16M -kernel out/qemu_mps2_an386/Huawei_LiteOS.elf -append "root=dev/vda or console=ttyS0" -nographic + ``` + +- LiteOS 启动后打印信息如下所示： + ``` + ********Hello Huawei LiteOS******** + + LiteOS Kernel Version : 5.1.0 + build date : Apr 2 2022 15:39:11 + + ********************************** + OsAppInit + cpu 0 entering scheduler + app init! + Hello, welcome to liteos demo! + + Huawei LiteOS # + ``` diff --git a/targets/qemu_mps2_an386/Src/arm_uart_drv.c b/targets/qemu_mps2_an386/Src/arm_uart_drv.c new file mode 100644 index 0000000000000000000000000000000000000000..e51664be5278e7023cc0ecfefc4c817c638cc22f --- /dev/null +++ b/targets/qemu_mps2_an386/Src/arm_uart_drv.c @@ -0,0 +1,286 @@ +/* + * Copyright (c) 2016-2018 ARM Limited + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "arm_uart_drv.h" + +#include + +/* UART register map structure */ +struct _arm_uart_reg_map_t { + volatile uint32_t data; /* Offset: 0x000 (R/W) data register */ + volatile uint32_t state; /* Offset: 0x004 (R/W) status register */ + volatile uint32_t ctrl; /* Offset: 0x008 (R/W) control register */ + union { + volatile uint32_t intrstatus; /* Offset: 0x00c (R/ ) interrupt status + * register */ + volatile uint32_t intrclear; /* Offset: 0x00c ( /W) interrupt clear + * register */ + }intr_reg; + volatile uint32_t bauddiv; /* Offset: 0x010 (R/W) Baudrate divider + * register */ +}; + +/* CTRL Register */ +#define ARM_UART_TX_EN (1ul << 0) +#define ARM_UART_RX_EN (1ul << 1) +#define ARM_UART_TX_INTR_EN (1ul << 2) +#define ARM_UART_RX_INTR_EN (1ul << 3) + +/* STATE Register */ +#define ARM_UART_TX_BF (1ul << 0) +#define ARM_UART_RX_BF (1ul << 1) + +/* INTSTATUS Register */ +#define ARM_UART_TX_INTR (1ul << 0) +#define ARM_UART_RX_INTR (1ul << 1) + +/* UART state definitions */ +#define ARM_UART_INITIALIZED (1ul << 0) + +enum arm_uart_error_t arm_uart_init(struct arm_uart_dev_t* dev, + uint32_t system_clk) +{ + struct _arm_uart_reg_map_t* p_uart = + (struct _arm_uart_reg_map_t*)dev->cfg->base; + if(system_clk == 0) { + return ARM_UART_ERR_INVALID_ARG; + } + + /* Sets baudrate and system clock */ + dev->data->system_clk = system_clk; + dev->data->baudrate = dev->cfg->default_baudrate; + + /* Sets baudrate */ + p_uart->bauddiv = (dev->data->system_clk / dev->cfg->default_baudrate); + + /* Enables receiver and transmitter */ + p_uart->ctrl = ARM_UART_RX_EN | ARM_UART_TX_EN; + + dev->data->state = ARM_UART_INITIALIZED; + + return ARM_UART_ERR_NONE; +} + +enum arm_uart_error_t arm_uart_set_baudrate(struct arm_uart_dev_t* dev, + uint32_t baudrate) +{ + uint32_t bauddiv; + struct _arm_uart_reg_map_t* p_uart = + (struct _arm_uart_reg_map_t*)dev->cfg->base; + + if(baudrate == 0) { + return ARM_UART_ERR_INVALID_BAUD; + } + + if(!(dev->data->state & ARM_UART_INITIALIZED)) { + return ARM_UART_ERR_NOT_INIT; + } + + /* Sets baudrate */ + bauddiv = (dev->data->system_clk / baudrate); + dev->data->baudrate = baudrate; + + /* Minimum bauddiv value */ + if(bauddiv < 16) { + return ARM_UART_ERR_INVALID_BAUD; + } + + p_uart->bauddiv = bauddiv; + + return ARM_UART_ERR_NONE; +} + +uint32_t arm_uart_get_baudrate(struct arm_uart_dev_t* dev) +{ + return dev->data->baudrate; +} + +enum arm_uart_error_t arm_uart_set_clock(struct arm_uart_dev_t* dev, + uint32_t system_clk) +{ + struct _arm_uart_reg_map_t* p_uart = + (struct _arm_uart_reg_map_t*)dev->cfg->base; + + if(system_clk == 0) { + return ARM_UART_ERR_INVALID_ARG; + } + + if(!(dev->data->state & ARM_UART_INITIALIZED)) { + return ARM_UART_ERR_NOT_INIT; + } + + /* Sets system clock */ + dev->data->system_clk = system_clk; + + /* Updates baudrate divider */ + p_uart->bauddiv = (dev->data->system_clk / dev->data->baudrate); + + /* Enables receiver and transmitter */ + return ARM_UART_ERR_NONE; +} + +enum arm_uart_error_t arm_uart_read(struct arm_uart_dev_t* dev, uint8_t* byte) +{ + struct _arm_uart_reg_map_t* p_uart = + (struct _arm_uart_reg_map_t*)dev->cfg->base; + if(!(p_uart->state & ARM_UART_RX_BF)) { + return ARM_UART_ERR_NOT_READY; + } + + /* Reads data */ + *byte = (uint8_t)p_uart->data; + + return ARM_UART_ERR_NONE; +} + +enum arm_uart_error_t arm_uart_write(struct arm_uart_dev_t* dev, uint8_t byte) +{ + struct _arm_uart_reg_map_t* p_uart = + (struct _arm_uart_reg_map_t*)dev->cfg->base; + + if(p_uart->state & ARM_UART_TX_BF) { + return ARM_UART_ERR_NOT_READY; + } + + /* Sends data */ + p_uart->data = byte; + + return ARM_UART_ERR_NONE; +} + +enum arm_uart_error_t arm_uart_irq_tx_enable(struct arm_uart_dev_t* dev) +{ + struct _arm_uart_reg_map_t* p_uart = + (struct _arm_uart_reg_map_t*)dev->cfg->base; + + if(!(dev->data->state & ARM_UART_INITIALIZED)) { + return ARM_UART_ERR_NOT_INIT; + } + + p_uart->ctrl |= ARM_UART_TX_INTR_EN; + + return ARM_UART_ERR_NONE; +} + +void arm_uart_irq_tx_disable(struct arm_uart_dev_t* dev) +{ + struct _arm_uart_reg_map_t* p_uart = + (struct _arm_uart_reg_map_t*)dev->cfg->base; + + if(dev->data->state & ARM_UART_INITIALIZED ) { + p_uart->ctrl &= ~ARM_UART_TX_INTR_EN; + } +} + +uint32_t arm_uart_tx_ready(struct arm_uart_dev_t* dev) +{ + struct _arm_uart_reg_map_t* p_uart = + (struct _arm_uart_reg_map_t*)dev->cfg->base; + + if(!(dev->data->state & ARM_UART_INITIALIZED)) { + return 0; + } + + return !(p_uart->state & ARM_UART_TX_BF); +} + +enum arm_uart_error_t arm_uart_irq_rx_enable(struct arm_uart_dev_t* dev) +{ + struct _arm_uart_reg_map_t* p_uart = + (struct _arm_uart_reg_map_t*)dev->cfg->base; + + if(!(dev->data->state & ARM_UART_INITIALIZED)) { + return ARM_UART_ERR_NOT_INIT; + } + + p_uart->ctrl |= ARM_UART_RX_INTR_EN; + + return ARM_UART_ERR_NONE; +} + +void arm_uart_irq_rx_disable(struct arm_uart_dev_t* dev) +{ + struct _arm_uart_reg_map_t* p_uart = + (struct _arm_uart_reg_map_t*)dev->cfg->base; + + if(dev->data->state & ARM_UART_INITIALIZED) { + p_uart->ctrl &= ~ARM_UART_RX_INTR_EN; + } +} + +uint32_t arm_uart_rx_ready(struct arm_uart_dev_t* dev) +{ + struct _arm_uart_reg_map_t* p_uart = + (struct _arm_uart_reg_map_t*)dev->cfg->base; + + if(!(dev->data->state & ARM_UART_INITIALIZED)) { + return 0; + } + + return (p_uart->state & ARM_UART_RX_BF); +} + +void arm_uart_clear_interrupt(struct arm_uart_dev_t* dev, + enum arm_uart_irq_t irq) +{ + struct _arm_uart_reg_map_t* p_uart = + (struct _arm_uart_reg_map_t*)dev->cfg->base; + + if(dev->data->state & ARM_UART_INITIALIZED) { + /* Clears pending interrupts */ + switch(irq) { + case ARM_UART_IRQ_RX: + p_uart->intr_reg.intrclear = ARM_UART_RX_INTR; + break; + case ARM_UART_IRQ_TX: + p_uart->intr_reg.intrclear = ARM_UART_TX_INTR; + break; + case ARM_UART_IRQ_COMBINED: + p_uart->intr_reg.intrclear = (ARM_UART_RX_INTR | ARM_UART_TX_INTR); + break; + case ARM_UART_IRQ_NONE: + break; + /* default: not defined to force all cases to be handled */ + } + } +} + +enum arm_uart_irq_t arm_uart_get_interrupt_status(struct arm_uart_dev_t* dev) +{ + struct _arm_uart_reg_map_t* p_uart = + (struct _arm_uart_reg_map_t*)dev->cfg->base; + enum arm_uart_irq_t intrstatus = ARM_UART_IRQ_NONE; + + + if(dev->data->state & ARM_UART_INITIALIZED) { + switch(p_uart->intr_reg.intrstatus) { + case ARM_UART_TX_INTR: + intrstatus = ARM_UART_IRQ_TX; + break; + case ARM_UART_RX_INTR: + intrstatus = ARM_UART_IRQ_RX; + break; + case ARM_UART_TX_INTR | ARM_UART_RX_INTR: + intrstatus = ARM_UART_IRQ_COMBINED; + break; + default: + break; + } + } + + return intrstatus; +} \ No newline at end of file diff --git a/targets/qemu_mps2_an386/Src/lfs_hal.c b/targets/qemu_mps2_an386/Src/lfs_hal.c new file mode 100644 index 0000000000000000000000000000000000000000..9de7587d4bf268f21754ced26c41cb6844c45c9a --- /dev/null +++ b/targets/qemu_mps2_an386/Src/lfs_hal.c @@ -0,0 +1,139 @@ +/* ---------------------------------------------------------------------------- + * Copyright (c) Huawei Technologies Co., Ltd. 2021-2022. All rights reserved. + * Description: Little Fs Hal Implementation + * Author: Huawei LiteOS Team + * Create: 2022-04-02 + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of + * conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list + * of conditions and the following disclaimer in the documentation and/or other materials + * provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used + * to endorse or promote products derived from this software without specific prior written + * permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, + * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR + * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, + * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; + * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR + * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF + * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * --------------------------------------------------------------------------- */ + +#include +#include +#include +#include "los_vfs.h" +#include "los_littlefs.h" +#include "los_mux_pri.h" +#include "los_memory.h" +#include "lfs_rambd.h" +#include "lfs.h" + +#ifdef __cplusplus +#if __cplusplus +extern "C" { +#endif /* __cplusplus */ +#endif /* __cplusplus */ + +#define READ_SIZE 16 +#define PROG_SIZE 16 +#define BLOCK_SIZE 4096 +#define BLOCK_COUNT 128 +#define CACHE_SIZE 16 +#define LOOKAHEAD_SIZE 16 +#define BLOCK_CYCLES 500 + +#if defined(LFS_THREADSAFE) +static uint32_t g_lfsMutex; +#endif /* LFS_THREADSAFE */ + +static int LfsRead(const struct lfs_config *cfg, lfs_block_t block, + lfs_off_t off, void *buffer, lfs_size_t size) +{ + (void)lfs_rambd_read(cfg, block, off, buffer, size); + return LFS_ERR_OK; +} + +static int LfsProg(const struct lfs_config *cfg, lfs_block_t block, + lfs_off_t off, const void *buffer, lfs_size_t size) +{ + (void)lfs_rambd_prog(cfg, block, off, buffer, size); + return LFS_ERR_OK; +} + +static int LfsErase(const struct lfs_config *cfg, lfs_block_t block) +{ + (void)lfs_rambd_erase(cfg, block); + return LFS_ERR_OK; +} + +static int LfsSync(const struct lfs_config *cfg) +{ + return LFS_ERR_OK; +} + +#if defined(LFS_THREADSAFE) +static int LfsLock(const struct lfs_config *conf) +{ + (void)conf; + (void)LOS_MuxPend(g_lfsMutex, LOS_WAIT_FOREVER); + return LFS_ERR_OK; +} + +static int LfsUnlock(const struct lfs_config *conf) +{ + (void)conf; + (void)LOS_MuxPost(g_lfsMutex); + return LFS_ERR_OK; +} +#endif /* LFS_THREADSAFE */ + +static struct lfs_config g_lfsConfig = { + // block device operations + .context = NULL, + .read = LfsRead, + .prog = LfsProg, + .erase = LfsErase, + .sync = LfsSync, +#if defined(LFS_THREADSAFE) + .lock = LfsLock, + .unlock = LfsUnlock, +#endif /* LFS_THREADSAFE */ + // block device configuration + .read_size = READ_SIZE, + .prog_size = PROG_SIZE, + .block_size = BLOCK_SIZE, + .block_count = BLOCK_COUNT, + .cache_size = CACHE_SIZE, + .lookahead_size = LOOKAHEAD_SIZE, + .block_cycles = BLOCK_CYCLES, +}; + +void LittlefsDriverInit(int needErase) +{ + lfs_rambd_t *bd = (lfs_rambd_t *)LOS_MemAlloc(m_aucSysMem0, sizeof(lfs_rambd_t)); + (void)memset_s(bd, sizeof(lfs_rambd_t), 0, sizeof(lfs_rambd_t)); + g_lfsConfig.context = bd; + (void)lfs_rambd_create(&g_lfsConfig); +} + +struct lfs_config *LittlefsConfigGet(void) +{ +#if defined(LFS_THREADSAFE) + (void)LOS_MuxCreate(&g_lfsMutex); +#endif /* LFS_THREADSAFE */ + return &g_lfsConfig; +} + +#ifdef __cplusplus +#if __cplusplus +} +#endif /* __cplusplus */ +#endif /* __cplusplus */ diff --git a/targets/qemu_mps2_an386/Src/main.c b/targets/qemu_mps2_an386/Src/main.c new file mode 100644 index 0000000000000000000000000000000000000000..83072c1b23e4c08c9b5db61ef13349fda4a46488 --- /dev/null +++ b/targets/qemu_mps2_an386/Src/main.c @@ -0,0 +1,65 @@ +/*---------------------------------------------------------------------------- + * Copyright (c) Huawei Technologies Co., Ltd. 2022-2022. All rights reserved. + * Description: Main Process + * Author: Huawei LiteOS Team + * Create: 2022-04-02 + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of + * conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list + * of conditions and the following disclaimer in the documentation and/or other materials + * provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used + * to endorse or promote products derived from this software without specific prior written + * permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, + * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR + * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, + * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; + * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR + * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF + * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * --------------------------------------------------------------------------- */ + +#include "los_base.h" +#include "los_task_pri.h" +#include "arch/canary.h" +#include "los_typedef.h" +#include "los_sys.h" +#include "usart.h" + +WEAK VOID SysTick_Handler(VOID) +{ + return; +} + +INT32 main(VOID) +{ +#ifdef __GNUC__ + ArchStackGuardInit(); +#endif + OsSetMainTask(); + OsCurrTaskSet(OsGetMainTask()); + + UartInit(); + + PRINT_RELEASE("\n********Hello Huawei LiteOS********\n" + "\nLiteOS Kernel Version : %s\n" + "build date : %s %s\n\n" + "**********************************\n", + HW_LITEOS_KERNEL_VERSION_STRING, __DATE__, __TIME__); + + UINT32 ret = OsMain(); + if (ret != LOS_OK) { + return LOS_NOK; + } + + OsStart(); + + return 0; +} diff --git a/targets/qemu_mps2_an386/Src/usart.c b/targets/qemu_mps2_an386/Src/usart.c new file mode 100644 index 0000000000000000000000000000000000000000..dc0cd7f4099366137a3d897a559015c918fef290 --- /dev/null +++ b/targets/qemu_mps2_an386/Src/usart.c @@ -0,0 +1,101 @@ +/* ---------------------------------------------------------------------------- + * Copyright (c) Huawei Technologies Co., Ltd. 2022-2022. All rights reserved. + * Description: Usart Init Implementation + * Author: Huawei LiteOS Team + * Create: 2022-04-02 + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of + * conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list + * of conditions and the following disclaimer in the documentation and/or other materials + * provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used + * to endorse or promote products derived from this software without specific prior written + * permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, + * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR + * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, + * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; + * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR + * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF + * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * --------------------------------------------------------------------------- */ + +#include "usart.h" +#include "platform.h" +#include "los_hwi.h" +#include "arm_uart_drv.h" +#include "soc.h" + +#ifdef __cplusplus +#if __cplusplus +extern "C" { +#endif +#endif + +static const struct arm_uart_dev_cfg_t g_uartCfg = {UART0_BASE, 115200}; +static struct arm_uart_dev_data_t g_uartData = {0}; +struct arm_uart_dev_t g_uartDev; + +VOID UartInit(VOID) +{ + g_uartDev.cfg = &g_uartCfg; + g_uartDev.data = &g_uartData; + (void)arm_uart_init(&g_uartDev, UART0_CLK_FREQ); + return; +} + +STATIC VOID UsartInit(VOID) +{ + g_uartDev.cfg = &g_uartCfg; + g_uartDev.data = &g_uartData; + (void)arm_uart_init(&g_uartDev, UART0_CLK_FREQ); +} + +STATIC VOID UsartWrite(const CHAR c) +{ + arm_uart_write(&g_uartDev, (UINT8)c); +} + +STATIC UINT8 UsartRead(VOID) +{ + UINT8 c; + if (arm_uart_read(&g_uartDev, &c) == ARM_UART_ERR_NOT_READY) { + return 0; + } + return c; +} + +STATIC VOID UartHandler(VOID) +{ + if (arm_uart_get_interrupt_status(&g_uartDev) == ARM_UART_IRQ_RX) { + uart_getc(); + (void)arm_uart_clear_interrupt(&g_uartDev, ARM_UART_IRQ_RX); + } +} + +STATIC INT32 UsartHwi(VOID) +{ + (void)arm_uart_irq_rx_enable(&g_uartDev); + (void)LOS_HwiCreate(NUM_HAL_INTERRUPT_UART, 0, 0, (HWI_PROC_FUNC)UartHandler, 0); + LOS_HwiEnable(NUM_HAL_INTERRUPT_UART); + return LOS_OK; +} + +UartControllerOps g_genericUart = { + .uartInit = UsartInit, + .uartWriteChar = UsartWrite, + .uartReadChar = UsartRead, + .uartHwiCreate = UsartHwi +}; + +#ifdef __cplusplus +#if __cplusplus +} +#endif /* __cplusplus */ +#endif /* __cplusplus */ diff --git a/targets/qemu_mps2_an386/Src/user_task.c b/targets/qemu_mps2_an386/Src/user_task.c new file mode 100644 index 0000000000000000000000000000000000000000..d0cf1562815baa40011b9672189e50a0ae9dbf24 --- /dev/null +++ b/targets/qemu_mps2_an386/Src/user_task.c @@ -0,0 +1,37 @@ +/*---------------------------------------------------------------------------- + * Copyright (c) Huawei Technologies Co., Ltd. 2022-2022. All rights reserved. + * Description: User Task Implementation + * Author: Huawei LiteOS Team + * Create: 2022-04-02 + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of + * conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list + * of conditions and the following disclaimer in the documentation and/or other materials + * provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used + * to endorse or promote products derived from this software without specific prior written + * permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, + * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR + * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, + * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; + * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR + * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF + * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * --------------------------------------------------------------------------- */ + +#include "los_typedef.h" +#include "los_task.h" +#include "demo_entry.h" + +VOID app_init(VOID) +{ + printf("app init!\n"); + DemoEntry(); +} diff --git a/targets/qemu_mps2_an386/include/asm/interrupt_config.h b/targets/qemu_mps2_an386/include/asm/interrupt_config.h new file mode 100644 index 0000000000000000000000000000000000000000..27de8fd5227f4405e7144c295c0694195753439f --- /dev/null +++ b/targets/qemu_mps2_an386/include/asm/interrupt_config.h @@ -0,0 +1,47 @@ +/* ---------------------------------------------------------------------------- + * Copyright (c) Huawei Technologies Co., Ltd. 2022-2022. All rights reserved. + * Description: Interrupt Config HeadFile + * Author: Huawei LiteOS Team + * Create: 2022-04-02 + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of + * conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list + * of conditions and the following disclaimer in the documentation and/or other materials + * provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used + * to endorse or promote products derived from this software without specific prior written + * permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, + * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR + * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, + * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; + * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR + * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF + * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * --------------------------------------------------------------------------- */ + +#ifndef _ASM_INTERRUPT_CONFIG_H +#define _ASM_INTERRUPT_CONFIG_H + +#ifdef __cplusplus +#if __cplusplus +extern "C" { +#endif /* __cplusplus */ +#endif /* __cplusplus */ + +#define OS_TICK_INT_NUM (SysTick_IRQn + 16) +#define NUM_HAL_INTERRUPT_UART (Uart0_Rx_IRQn + 16) + +#ifdef __cplusplus +#if __cplusplus +} +#endif /* __cplusplus */ +#endif /* __cplusplus */ + +#endif /* _ASM_INTERRUPT_CONFIG_H */ diff --git a/targets/qemu_mps2_an386/include/asm/memmap_config.h b/targets/qemu_mps2_an386/include/asm/memmap_config.h new file mode 100644 index 0000000000000000000000000000000000000000..a25ada8aff17ff880d40933af5f45f3c5f9de26a --- /dev/null +++ b/targets/qemu_mps2_an386/include/asm/memmap_config.h @@ -0,0 +1,49 @@ +/* ---------------------------------------------------------------------------- + * Copyright (c) Huawei Technologies Co., Ltd. 2022-2022. All rights reserved. + * Description: Memory Map Config HeadFile + * Author: Huawei LiteOS Team + * Create: 2022-04-02 + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of + * conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list + * of conditions and the following disclaimer in the documentation and/or other materials + * provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used + * to endorse or promote products derived from this software without specific prior written + * permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, + * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR + * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, + * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; + * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR + * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF + * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * --------------------------------------------------------------------------- */ + +#ifndef _MEMMAP_CONFIG_H +#define _MEMMAP_CONFIG_H + +#ifdef __cplusplus +#if __cplusplus +extern "C" { +#endif /* __cplusplus */ +#endif /* __cplusplus */ + +extern UINT32 __LOS_HEAP_ADDR_START__; +extern UINT32 __LOS_HEAP_ADDR_END__; +#define OS_SYS_MEM_ADDR (VOID *)(__LOS_HEAP_ADDR_START__) +#define OS_SYS_MEM_SIZE ((UINT32)(__LOS_HEAP_ADDR_END__ - __LOS_HEAP_ADDR_START__ + 1)) + +#ifdef __cplusplus +#if __cplusplus +} +#endif /* __cplusplus */ +#endif /* __cplusplus */ + +#endif /* _MEMMAP_CONFIG_H */ diff --git a/targets/qemu_mps2_an386/include/asm/platform.h b/targets/qemu_mps2_an386/include/asm/platform.h new file mode 100644 index 0000000000000000000000000000000000000000..38d085a5d8da30c71cf668d87d3f0c28294df4d7 --- /dev/null +++ b/targets/qemu_mps2_an386/include/asm/platform.h @@ -0,0 +1,58 @@ +/* ---------------------------------------------------------------------------- + * Copyright (c) Huawei Technologies Co., Ltd. 2022-2022. All rights reserved. + * Description: Platform HeadFile + * Author: Huawei LiteOS Team + * Create: 2022-03-10 + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of + * conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list + * of conditions and the following disclaimer in the documentation and/or other materials + * provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used + * to endorse or promote products derived from this software without specific prior written + * permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, + * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR + * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, + * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; + * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR + * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF + * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * --------------------------------------------------------------------------- */ + +#ifndef _ASM_PLATFORM_H +#define _ASM_PLATFORM_H + +#include "los_typedef.h" +#include "uart.h" +#include "hal_timer.h" +#include "soc.h" + +#include "interrupt_config.h" +#include "memmap_config.h" + +#ifdef __cplusplus +#if __cplusplus +extern "C" { +#endif /* __cplusplus */ +#endif /* __cplusplus */ + +#define OS_SYS_CLOCK SYSCLK_FREQ + +#ifdef LOSCFG_PLATFORM_OSAPPINIT +extern VOID app_init(VOID); +#endif + +#ifdef __cplusplus +#if __cplusplus +} +#endif /* __cplusplus */ +#endif /* __cplusplus */ + +#endif /* _ASM_PLATFORM_H */ diff --git a/targets/qemu_mps2_an386/include/hisoc/clock.h b/targets/qemu_mps2_an386/include/hisoc/clock.h new file mode 100644 index 0000000000000000000000000000000000000000..b4a71df3da64bcb71a829ad9211a97081215467d --- /dev/null +++ b/targets/qemu_mps2_an386/include/hisoc/clock.h @@ -0,0 +1,48 @@ +/*---------------------------------------------------------------------------- + * Copyright (c) Huawei Technologies Co., Ltd. 2022-2022. All rights reserved. + * Description: Targets Stm32f429 Asm Hisoc Clock HeadFile + * Author: Huawei LiteOS Team + * Create: 2022-04-02 + * Redistribution and use in source and binary forms, with or without modification, + * are permitted provided that the following conditions are met: + * 1. Redistributions of source code must retain the above copyright notice, this list of + * conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, this list + * of conditions and the following disclaimer in the documentation and/or other materials + * provided with the distribution. + * 3. Neither the name of the copyright holder nor the names of its contributors may be used + * to endorse or promote products derived from this software without specific prior written + * permission. + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, + * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR + * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR + * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, + * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, + * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; + * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, + * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR + * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF + * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * --------------------------------------------------------------------------- */ + +#ifndef _CLOCK_H +#define _CLOCK_H + +#include "asm/platform.h" + +#ifdef __cplusplus +#if __cplusplus +extern "C"{ +#endif /* __cplusplus */ +#endif /* __cplusplus */ + +#define get_bus_clk() OS_SYS_CLOCK + +#ifdef __cplusplus +#if __cplusplus +} +#endif /* __cplusplus */ +#endif /* __cplusplus */ + +#endif /* _CLOCK_H */ diff --git a/targets/qemu_mps2_an386/liteos.ld b/targets/qemu_mps2_an386/liteos.ld new file mode 100644 index 0000000000000000000000000000000000000000..44afafd30f6c5becff2e93d61472b99fe8030651 --- /dev/null +++ b/targets/qemu_mps2_an386/liteos.ld @@ -0,0 +1,187 @@ +OUTPUT_FORMAT("elf32-littlearm", "elf32-bigarm", "elf32-littlearm") +OUTPUT_ARCH(arm) +ENTRY(Reset_Handler) /* Entry Point */ + +/* Highest address of the user mode stack */ +_sstack = 0x21000000; /* start of RAM */ +_estack = 0x20010000; /* end of RAM */ +/* Generate a link error if heap and stack don't fit into RAM */ +_Min_Heap_Size = 0x200; /* required amount of heap */ +_Min_Stack_Size = 0x400; /* required amount of stack */ + +/* Specify the memory areas */ +MEMORY +{ + FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 3M + RAM (xrw) : ORIGIN = 0x21000000, LENGTH = 16M +} + +/* Define output sections */ +SECTIONS +{ + /* The startup code goes first into FLASH */ + .isr_vector : + { + . = ALIGN(4); + KEEP(*(.isr_vector)) /* Startup code */ + . = ALIGN(4); + } >FLASH + + /* The program code and other data goes into FLASH */ + .text : + { + __text_start = .; + . = ALIGN(4); + *(.text) /* .text sections (code) */ + *(.text*) /* .text* sections (code) */ + *(.glue_7) /* glue arm to thumb code */ + *(.glue_7t) /* glue thumb to arm code */ + *(.eh_frame) + + KEEP (*(.init)) + KEEP (*(.fini)) + + . = ALIGN(4); + _etext = .; /* define a global symbols at end of code */ + __text_end = _etext; + } >FLASH + + /* Constant data goes into FLASH */ + .rodata : + { + . = ALIGN(4); + __rodata_start = .; + __oshell_start = .; + KEEP (*(oshell)) + __oshell_end = .; + + . = ALIGN(4); + __osdriv_start = .; + KEEP (*(osdriv)) + __osdriv_end = .; + + . = ALIGN(4); + *(.rodata) /* .rodata sections (constants, strings, etc.) */ + *(.rodata*) /* .rodata* sections (constants, strings, etc.) */ + . = ALIGN(4); + __rodata_end = .; + } >FLASH + + .ARM.extab : + { + . = ALIGN(4); + *(.ARM.extab* .gnu.linkonce.armextab.*) + . = ALIGN(4); + } >FLASH + .ARM : { +. = ALIGN(4); + __exidx_start = .; + *(.ARM.exidx*) + __exidx_end = .; + . = ALIGN(4); + } >FLASH + + .preinit_array : + { + . = ALIGN(4); + PROVIDE_HIDDEN (__preinit_array_start = .); + KEEP (*(.preinit_array*)) + PROVIDE_HIDDEN (__preinit_array_end = .); + . = ALIGN(4); + } >FLASH + + .init_array : + { + . = ALIGN(4); + PROVIDE_HIDDEN (__init_array_start = .); + KEEP (*(SORT(.init_array.*))) + KEEP (*(.init_array*)) + PROVIDE_HIDDEN (__init_array_end = .); + . = ALIGN(4); + } >FLASH + .fini_array : + { + . = ALIGN(4); + PROVIDE_HIDDEN (__fini_array_start = .); + KEEP (*(SORT(.fini_array.*))) + KEEP (*(.fini_array*)) + PROVIDE_HIDDEN (__fini_array_end = .); + . = ALIGN(4); + } >FLASH + + /* used by the startup to initialize liteos vector */ + _si_liteos_vector_data = LOADADDR(.vector_ram); + + /* Initialized liteos vector sections goes into RAM, load LMA copy after code */ + .vector_ram : + { + . = ORIGIN(RAM); + _s_liteos_vector = .; + *(.data.vector) /* liteos vector in ram */ + _e_liteos_vector = .; + } > RAM AT> FLASH + + /* used by the startup to initialize data */ + _sidata = LOADADDR(.data); + + /* Initialized data sections goes into RAM, load LMA copy after code */ + .data : + { + . = ALIGN(4); + __ram_data_start = _sdata; + _sdata = .; /* create a global symbol at data start */ + *(.data) /* .data sections */ + *(.data*) /* .data* sections */ + KEEP(*( SORT (.liteos.table.*))); + + . = ALIGN(4); + _edata = .; /* define a global symbol at data end */ + __ram_data_end = _edata; + } >RAM AT> FLASH + + + /* Uninitialized data section */ + . = ALIGN(4); + .bss : + { + /* This is used by the startup in order to initialize the .bss secion */ + _sbss = .; /* define a global symbol at bss start */ + __bss_start__ = _sbss; + __bss_start = _sbss; + *(.bss) + *(.bss*) + *(COMMON) + + . = ALIGN(4); + _ebss = .; /* define a global symbol at bss end */ + __bss_end__ = _ebss; + __bss_end = _ebss; + } >RAM + + /* User_heap_stack section, used to check that there is enough RAM left */ + ._user_heap_stack : + { + . = ALIGN(8); + PROVIDE ( end = . ); + PROVIDE ( _end = . ); + . = . + _Min_Heap_Size; + . = . + _Min_Stack_Size; + . = ALIGN(8); + } >RAM + + . = ALIGN(8); + __los_heap_addr_start__ = .; + __los_heap_addr_end__ = ORIGIN(RAM) + LENGTH(RAM) - _Min_Stack_Size - 1; + + __fast_end = .; + + /* Remove information from the standard libraries */ + /DISCARD/ : + { + libc.a ( * ) + libm.a ( * ) + libgcc.a ( * ) + } + + .ARM.attributes 0 : { *(.ARM.attributes) } +} diff --git a/targets/qemu_mps2_an386/startup.S b/targets/qemu_mps2_an386/startup.S new file mode 100644 index 0000000000000000000000000000000000000000..c7997c220d6dbfa252b1421170192258dc7386a4 --- /dev/null +++ b/targets/qemu_mps2_an386/startup.S @@ -0,0 +1,184 @@ + .syntax unified + .cpu cortex-m4 + .fpu softvfp + .thumb + +.global g_pfnVectors +.global Default_Handler + +.word __los_heap_addr_start__ +.word __los_heap_addr_end__ + +/* start address for the initialization values of the .vector_ram section. +defined in linker script */ +.word _si_liteos_vector_data +/* start address for the .vector_ram section. defined in linker script */ +.word _s_liteos_vector +/* end address for the .vector_ram section. defined in linker script */ +.word _e_liteos_vector + +/* start address for the initialization values of the .data section. +defined in linker script */ +.word _sidata +/* start address for the .data section. defined in linker script */ +.word _sdata +/* end address for the .data section. defined in linker script */ +.word _edata +/* start address for the .bss section. defined in linker script */ +.word _sbss +/* end address for the .bss section. defined in linker script */ +.word _ebss +/* stack used for SystemInit_ExtMemCtl; always internal RAM used */ + +/** + * @brief This is the code that gets called when the processor first + * starts execution following a reset event. Only the absolutely + * necessary set is performed, after which the application + * supplied main() routine is called. + * @param None + * @retval : None +*/ + + .section .text + .global __LOS_HEAP_ADDR_START__ + .global __LOS_HEAP_ADDR_END__ +__LOS_HEAP_ADDR_START__: + .word __los_heap_addr_start__ +__LOS_HEAP_ADDR_END__: + .word __los_heap_addr_end__ + + .section .text.Reset_Handler + .weak Reset_Handler + .type Reset_Handler, %function +Reset_Handler: + cpsid i + ldr sp, =_estack /* set stack pointer */ + +/* Copy the vector_ram segment initializers from flash to SRAM */ + movs r1, #0 + b LoopCopyVectorInit + +CopyVectorInit: + ldr r3, =_si_liteos_vector_data + ldr r3, [r3, r1] + str r3, [r0, r1] + adds r1, r1, #4 + +LoopCopyVectorInit: + ldr r0, =_s_liteos_vector + ldr r3, =_e_liteos_vector + adds r2, r0, r1 + cmp r2, r3 + bcc CopyVectorInit + +/* Copy the data segment initializers from flash to SRAM */ + movs r1, #0 + b LoopCopyDataInit + +CopyDataInit: + ldr r3, =_sidata + ldr r3, [r3, r1] + str r3, [r0, r1] + adds r1, r1, #4 + +LoopCopyDataInit: + ldr r0, =_sdata + ldr r3, =_edata + adds r2, r0, r1 + cmp r2, r3 + bcc CopyDataInit + ldr r2, =_sbss + b LoopFillZerobss +/* Zero fill the bss segment. */ +FillZerobss: + movs r3, #0 + str r3, [r2], #4 + +LoopFillZerobss: + ldr r3, = _ebss + cmp r2, r3 + bcc FillZerobss + +/* Call static constructors */ + // bl __libc_init_array +/* Call the application's entry point.*/ + bl main + bx lr +.size Reset_Handler, .-Reset_Handler + +/** + * @brief This is the code that gets called when the processor receives an + * unexpected interrupt. This simply enters an infinite loop, preserving + * the system state for examination by a debugger. + * @param None + * @retval None +*/ + .section .text.Default_Handler,"ax",%progbits +Default_Handler: +Infinite_Loop: + b Infinite_Loop + .size Default_Handler, .-Default_Handler +/****************************************************************************** +* +* The minimal vector table for a Cortex M3. Note that the proper constructs +* must be placed on this to ensure that it ends up at physical address +* 0x0000.0000. +* +*******************************************************************************/ + .section .isr_vector,"a",%progbits + .type g_pfnVectors, %object + .size g_pfnVectors, .-g_pfnVectors + +g_pfnVectors: + .word _estack + .word Reset_Handler + .word NMI_Handler + .word HardFault_Handler + .word MemManage_Handler + .word BusFault_Handler + .word UsageFault_Handler + .word 0 + .word 0 + .word 0 + .word 0 + .word SVC_Handler + .word DebugMon_Handler + .word 0 + .word PendSV_Handler + .word SysTick_Handler + + +/******************************************************************************* +* +* Provide weak aliases for each Exception handler to the Default_Handler. +* As they are weak aliases, any function with the same name will override +* this definition. +* +*******************************************************************************/ + .weak NMI_Handler + .thumb_set NMI_Handler,Default_Handler + + .weak HardFault_Handler + .thumb_set HardFault_Handler,Default_Handler + + .weak MemManage_Handler + .thumb_set MemManage_Handler,Default_Handler + + .weak BusFault_Handler + .thumb_set BusFault_Handler,Default_Handler + + .weak UsageFault_Handler + .thumb_set UsageFault_Handler,Default_Handler + + .weak SVC_Handler + .thumb_set SVC_Handler,Default_Handler + + .weak DebugMon_Handler + .thumb_set DebugMon_Handler,Default_Handler + + .weak PendSV_Handler + .thumb_set PendSV_Handler,Default_Handler + + .weak SysTick_Handler + .thumb_set SysTick_Handler,Default_Handler + diff --git a/tools/build/config/qemu_mps2_an386.config b/tools/build/config/qemu_mps2_an386.config new file mode 100644 index 0000000000000000000000000000000000000000..07d9467d63aa8bc0cc29429c7a9c8093c8c473f9 --- /dev/null +++ b/tools/build/config/qemu_mps2_an386.config @@ -0,0 +1,504 @@ +# Generated by Huawei LiteOS Kconfig Tool +# +# Compiler +# +LOSCFG_COMPILER_GCC=y +# LOSCFG_COMPILER_HIMIX_32 is not set +LOSCFG_COMPILER_ARM_NONE_EABI=y + +# +# Compiler Options +# +# end of Compiler Options + +# LOSCFG_COMPILER_OPTIMIZE_NONE is not set +LOSCFG_COMPILER_OPTIMIZE_SPEED=y +# LOSCFG_COMPILER_OPTIMIZE_SIZE is not set +# end of Compiler + +# +# Targets +# +# LOSCFG_FAMILY_APM32 is not set +# LOSCFG_FAMILY_CSKY is not set +# LOSCFG_FAMILY_FMSH is not set +# LOSCFG_FAMILY_GD is not set +LOSCFG_FAMILY_QEMU=y +# LOSCFG_FAMILY_RASPBERRY is not set +# LOSCFG_FAMILY_SIFIVE is not set +# LOSCFG_FAMILY_STM32 is not set +# LOSCFG_FAMILY_XTENSA is not set +LOSCFG_PLATFORM="qemu_mps2_an386" +# LOSCFG_PLATFORM_PBX_A9 is not set +# LOSCFG_PLATFORM_QEMU_VIRT_A53 is not set +# LOSCFG_PLATFORM_SMARTL_E802 is not set +# LOSCFG_PLATFORM_ESP32_QEMU is not set +LOSCFG_PLATFORM_MPS2AN386=y +LOSCFG_USING_BOARD_LD=y +# LOSCFG_HW_QSPI is not set +LOSCFG_ARCH_ARM_AARCH32=y +LOSCFG_ARCH_ARM_CORTEX_M=y +LOSCFG_ARCH_ARM_V7M=y +LOSCFG_ARCH_ARM_VER="armv7-m" +LOSCFG_ARCH_FPU_VFP_V4=y +LOSCFG_ARCH_FPU_VFP_D16=y +LOSCFG_ARCH_FPU="fpv4-sp-d16" +LOSCFG_ARCH_CORTEX_M4=y +LOSCFG_ARCH_CPU="cortex-m4" +# LOSCFG_ARCH_FPU_ENABLE is not set +LOSCFG_APC_ENABLE=y +# LOSCFG_FPB_ENABLE is not set +# end of Targets + +# +# Kernel +# +# LOSCFG_KERNEL_SMP is not set + +# +# Basic Config +# +LOSCFG_SCHED_SQ=y + +# +# Task +# +LOSCFG_BASE_CORE_TIMESLICE=y +LOSCFG_BASE_CORE_TIMESLICE_TIMEOUT=2 +LOSCFG_OBSOLETE_API=y +LOSCFG_BASE_CORE_TSK_MONITOR=y +# LOSCFG_TASK_STATIC_ALLOCATION is not set +LOSCFG_BASE_CORE_TSK_LIMIT=16 +LOSCFG_BASE_CORE_TSK_MIN_STACK_SIZE=1024 +LOSCFG_BASE_CORE_TSK_DEFAULT_STACK_SIZE=1536 +LOSCFG_BASE_CORE_TSK_SWTMR_STACK_SIZE=1536 +LOSCFG_BASE_CORE_TSK_IDLE_STACK_SIZE=2048 +LOSCFG_BASE_CORE_TSK_DEFAULT_PRIO=10 +LOSCFG_BASE_CORE_TICK_PER_SECOND=1000 +# end of Task + +LOSCFG_BASE_CORE_USE_MULTI_LIST=y +# LOSCFG_BASE_CORE_USE_SINGLE_LIST is not set +# end of Basic Config + +# +# Memory Management +# +# LOSCFG_KERNEL_MEM_BESTFIT is not set +LOSCFG_KERNEL_MEM_BESTFIT_LITTLE=y +# LOSCFG_KERNEL_MEM_SLAB_EXTENTION is not set +LOSCFG_MEM_TASK_STAT=y +LOSCFG_KERNEL_MEMBOX=y +LOSCFG_KERNEL_MEMBOX_STATIC=y +# LOSCFG_KERNEL_MEMBOX_DYNAMIC is not set +# end of Memory Management + +# +# Interrupt Management +# +LOSCFG_SHARED_IRQ=y +LOSCFG_PLATFORM_HWI_LIMIT=256 +LOSCFG_HWI_PRIO_LIMIT=32 +# end of Interrupt Management + +# +# Exception Management +# +# LOSCFG_ARCH_EXC_SIMPLE_INFO is not set +# LOSCFG_SHELL_EXCINFO_DUMP is not set +# end of Exception Management + +LOSCFG_BASE_CORE_SWTMR=y +LOSCFG_BASE_CORE_SWTMR_LIMIT=16 +# LOSCFG_BASE_CORE_SWTMR_IN_ISR is not set +LOSCFG_BASE_IPC_QUEUE=y +# LOSCFG_QUEUE_STATIC_ALLOCATION is not set +LOSCFG_BASE_IPC_QUEUE_LIMIT=10 +LOSCFG_BASE_IPC_EVENT=y +LOSCFG_BASE_IPC_MUX=y +LOSCFG_MUTEX_WAITMODE_PRIO=y +# LOSCFG_MUTEX_WAITMODE_FIFO is not set +LOSCFG_BASE_IPC_MUX_LIMIT=20 +LOSCFG_BASE_IPC_SEM=y +LOSCFG_BASE_IPC_SEM_LIMIT=20 +# LOSCFG_KERNEL_NX is not set +# LOSCFG_KERNEL_RINGBUF is not set +LOSCFG_KERNEL_EXTKERNEL=y +LOSCFG_KERNEL_CPPSUPPORT=y +# LOSCFG_KERNEL_CPUP is not set +LOSCFG_KERNEL_LOWPOWER=y + +# +# Low Power Management Configure +# +LOSCFG_KERNEL_TICKLESS=y +# LOSCFG_KERNEL_POWER_MGR is not set +# end of Low Power Management Configure + +# LOSCFG_KERNEL_PERF is not set +LOSCFG_BASE_CORE_SYS_RES_CHECK=y +# LOSCFG_KERNEL_TRACE is not set +# end of Kernel + +# +# Lib +# +LOSCFG_LIB_LIBC=y +LOSCFG_COMPAT_POSIX=y +LOSCFG_LIB_LIBM=y +LOSCFG_LIB_STDIO=y +LOSCFG_SUPPORT_LONG_DOUBLE=y +LOSCFG_LIB_ZLIB=y +# LOSCFG_LIB_CPP_EXTEND is not set +# end of Lib + +# +# Compat +# +LOSCFG_COMPAT_CMSIS=y +CMSIS_OS_VER=2 +# end of Compat + +# +# Components +# + +# +# Ai +# +# LOSCFG_COMPONENTS_AI is not set +# end of Ai + +# +# Network +# +# LOSCFG_COMPONENTS_NET_LWIP is not set +# LOSCFG_COMPONENTS_NET_IFCONFIG is not set +# LOSCFG_COMPONENTS_NET_PING is not set +# LOSCFG_COMPONENTS_NET_AT is not set +# LOSCFG_COMPONENTS_NET_SAL is not set +# LOSCFG_COMPONENTS_PCAP is not set +# LOSCFG_COMPONENTS_IPERF is not set +# LOSCFG_COMPONENTS_TFTP_SERVER is not set +# LOSCFG_COMPONENTS_LIBRWS is not set +# LOSCFG_COMPONENTS_HTTP_PARSER is not set +# end of Network + +# +# Connectivity +# +# LOSCFG_COMPONENTS_CONNECTIVITY_MQTT is not set +# LOSCFG_COMPONENTS_CONNECTIVITY_LWM2M is not set +# LOSCFG_COMPONENTS_ATINY_MQTT is not set +# LOSCFG_COMPONENTS_ATINY_LWM2M is not set +# LOSCFG_COMPONENTS_CONNECTIVITY_NB_IOT is not set +LOSCFG_COMPONENTS_ATINY_LOG=y +# end of Connectivity + +# +# FileSystem +# +# LOSCFG_COMPONENTS_FS_FATFS is not set +# LOSCFG_COMPONENTS_FS_LITTLEFS is not set +# LOSCFG_COMPONENTS_FS_RAMFS is not set +# LOSCFG_COMPONENTS_FS_SPIFFS is not set +# end of FileSystem + +# +# Graphical User Interface +# +# end of Graphical User Interface + +# +# Language +# +# LOSCFG_COMPONENTS_JERRYSCRIPT is not set +# LOSCFG_COMPONENTS_LUA is not set +# LOSCFG_COMPONENTS_MICROPYTHON is not set +# end of Language + +# +# Lib +# +# LOSCFG_COMPONENTS_LIB_CJSON is not set +# end of Lib + +# +# Media +# +# LOSCFG_COMPONENTS_LIBPNG is not set +# LOSCFG_COMPONENTS_OPENEXIF is not set +# LOSCFG_COMPONENTS_OPUS is not set +# LOSCFG_COMPONENTS_PIXMAN is not set +# LOSCFG_COMPONENTS_UPNP is not set +# LOSCFG_COMPONENTS_TJPGDEC is not set +# end of Media + +# +# Device OTA +# +# LOSCFG_COMPONENTS_OTA is not set +# end of Device OTA + +# +# Security +# +# LOSCFG_COMPONENTS_SECURITY_MBEDTLS is not set +# LOSCFG_COMPONENTS_OPENSSL is not set +# LOSCFG_COMPONENTS_RHASH is not set +# LOSCFG_COMPONENTS_TINYCRYPT is not set +# end of Security + +# +# Sensorhub +# +# LOSCFG_COMPONENTS_SENSORHUB is not set +# end of Sensorhub + +# +# Utility +# +# LOSCFG_COMPONENTS_APRILTAG is not set +# LOSCFG_COMPONENTS_BIDIREFERENCE is not set +# LOSCFG_COMPONENTS_C_ALGORITHMS is not set +# LOSCFG_COMPONENTS_CURL is not set +# LOSCFG_COMPONENTS_EASYFLASH is not set +# LOSCFG_COMPONENTS_FASTLZ is not set +# LOSCFG_COMPONENTS_FREETYPE is not set +# LOSCFG_COMPONENTS_GENANN is not set +# LOSCFG_COMPONENTS_HARFBUZZ is not set +# LOSCFG_COMPONENTS_ICONV is not set +# LOSCFG_COMPONENTS_INIH is not set +# LOSCFG_COMPONENTS_INIPARSER is not set +# LOSCFG_COMPONENTS_JSMN is not set +# LOSCFG_COMPONENTS_JSON_C is not set +# LOSCFG_COMPONENTS_JSONCPP is not set +# LOSCFG_COMPONENTS_LIBEVENT is not set +# LOSCFG_COMPONENTS_LIBXML2 is not set +# LOSCFG_COMPONENTS_MINMEA is not set +# LOSCFG_COMPONENTS_PDFGEN is not set +# LOSCFG_COMPONENTS_QRENCODE is not set +# LOSCFG_COMPONENTS_REGEX is not set +# LOSCFG_COMPONENTS_SFUD is not set +# LOSCFG_COMPONENTS_SQLITE is not set +# LOSCFG_COMPONENTS_THTTPD is not set +# LOSCFG_COMPONENTS_TINYFRAME is not set +# LOSCFG_COMPONENTS_TINYXML2 is not set +# LOSCFG_COMPONENTS_URIPARSER is not set +# end of Utility + +# +# Bootloader +# +# LOSCFG_BOOTLOADER is not set +# end of Bootloader +# end of Components + +# +# Demos +# + +# +# Agent Tiny Lwm2m Demo +# +# LOSCFG_DEMOS_AGENT_TINY_LWM2M is not set +# end of Agent Tiny Lwm2m Demo + +# +# Agent Tiny Mqtt Demo +# +# LOSCFG_DEMOS_AGENT_TINY_MQTT is not set +# end of Agent Tiny Mqtt Demo + +# +# Agriculture Demo +# +# end of Agriculture Demo + +# +# Ai Demo +# +# LOSCFG_DEMOS_AI is not set +# end of Ai Demo + +# +# Drivers Demo +# +# LOSCFG_DEMO_CAN is not set +# end of Drivers Demo + +# +# Dtls Server Demo +# +# LOSCFG_DEMOS_DTLS_SERVER is not set +# end of Dtls Server Demo + +# +# FileSystem Demo +# +# LOSCFG_DEMOS_FS_FAT is not set +# LOSCFG_DEMOS_FS_LITTLEFS is not set +# LOSCFG_DEMOS_FS_RAM is not set +# LOSCFG_DEMOS_FS_SPIF is not set +# end of FileSystem Demo + +# +# Graphical User Interface Demo +# +# end of Graphical User Interface Demo + +# +# Http Client Demo +# +# LOSCFG_DEMOS_HTTP_CLIENT is not set +# end of Http Client Demo + +# +# Ipv6 Client Demo +# +# LOSCFG_DEMOS_IPV6_CLIENT is not set +# end of Ipv6 Client Demo + +# +# Kernel Demo +# +# LOSCFG_DEMOS_KERNEL is not set +# end of Kernel Demo + +# +# Language Demo +# +# LOSCFG_DEMOS_JERRYSCRIPT is not set +# LOSCFG_DEMOS_LUA is not set +# end of Language Demo + +# +# Librws Demo +# +# LOSCFG_DEMOS_LIBRWS is not set +# end of Librws Demo + +# +# LMS Demo +# +# LOSCFG_DEMOS_LMS is not set +# end of LMS Demo + +# +# Media Demo +# +# LOSCFG_DEMOS_LIBPNG is not set +# LOSCFG_DEMOS_OPENEXIF is not set +# LOSCFG_DEMOS_OPUS is not set +# LOSCFG_DEMOS_PIXMAN is not set +# LOSCFG_DEMOS_UPNP is not set +# LOSCFG_DEMOS_TJPGDEC is not set +# end of Media Demo + +# +# NB-IoT Demo Without Atiny +# +# LOSCFG_DEMOS_NBIOT_WITHOUT_ATINY is not set +# end of NB-IoT Demo Without Atiny + +# +# PERF Demo +# +# LOSCFG_DEMOS_PERF is not set +# end of PERF Demo + +# +# Security Demo +# +# LOSCFG_DEMOS_OPENSSL is not set +# LOSCFG_DEMOS_RHASH is not set +# LOSCFG_DEMOS_TINYCRYPT is not set +# end of Security Demo + +# +# Sensorhub Demo +# + +# +# only support Cloud_STM32F429IGTx_FIRE +# +# LOSCFG_DEMOS_SENSORHUB is not set +# end of Sensorhub Demo + +# +# Trace Demo +# +# LOSCFG_DEMOS_TRACE is not set +# end of Trace Demo + +# +# Utility Demo +# +# LOSCFG_DEMOS_BIDIREFERENCE is not set +# LOSCFG_DEMOS_C_ALGORITHMS is not set +# LOSCFG_DEMOS_CURL is not set +# LOSCFG_DEMOS_EASYFLASH is not set +# LOSCFG_DEMOS_FASTLZ is not set +# LOSCFG_DEMOS_FREETYPE is not set +# LOSCFG_DEMOS_GENANN is not set +# LOSCFG_DEMOS_HARFBUZZ is not set +# LOSCFG_DEMOS_ICONV is not set +# LOSCFG_DEMOS_INIH is not set +# LOSCFG_DEMOS_INIPARSER is not set +# LOSCFG_DEMOS_JSMN is not set +# LOSCFG_DEMOS_JSON_C is not set +# LOSCFG_DEMOS_JSONCPP is not set +# LOSCFG_DEMOS_LIBEVENT is not set +# LOSCFG_DEMOS_LIBXML2 is not set +# LOSCFG_DEMOS_MINMEA is not set +# LOSCFG_DEMOS_PDFGEN is not set +# LOSCFG_DEMOS_QRENCODE is not set +# LOSCFG_DEMOS_SQLITE is not set +# LOSCFG_DEMOS_TINYFRAME is not set +# LOSCFG_DEMOS_TINYXML2 is not set +# LOSCFG_DEMOS_SFUD is not set +# LOSCFG_DEMOS_URIPARSER is not set +# end of Utility Demo +# end of Demos + +# +# Debug +# +LOSCFG_COMPILE_DEBUG=y +LOSCFG_PLATFORM_ADAPT=y +LOSCFG_BACKTRACE=y +# LOSCFG_ENABLE_MAGICKEY is not set +# LOSCFG_THUMB is not set +LOSCFG_DEBUG_VERSION=y +# LOSCFG_DEBUG_KERNEL is not set +LOSCFG_SHELL=y +LOSCFG_SHELL_UART=y +# LOSCFG_SHELL_EXTENDED_CMDS is not set +# LOSCFG_SHELL_DMESG is not set +# LOSCFG_MEM_DEBUG is not set +LOSCFG_SERIAL_OUTPUT_ENABLE=y + +# +# TestSuite or AppInit +# +LOSCFG_PLATFORM_OSAPPINIT=y +# end of TestSuite or AppInit +# end of Debug + +# +# Driver +# +# LOSCFG_DRIVERS_BASE is not set +LOSCFG_CORTEX_M_NVIC=y +LOSCFG_CORTEX_M_SYSTICK=y +LOSCFG_DRIVERS_SIMPLE_UART=y +# end of Driver + +# +# Stack Smashing Protector (SSP) Compiler Feature +# +# LOSCFG_CC_NO_STACKPROTECTOR is not set +# LOSCFG_CC_STACKPROTECTOR is not set +LOSCFG_CC_STACKPROTECTOR_STRONG=y +# LOSCFG_CC_STACKPROTECTOR_ALL is not set +# end of Stack Smashing Protector (SSP) Compiler Feature